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» Power minimization using control generated clocks
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IJCNN
2006
IEEE
14 years 2 months ago
Optimal Design of SVC Damping Controllers with Wide Area Measurements Using Small Population based PSO
—Static Var Compensator (SVC) are employed for providing better voltage regulation and transient stability especially for increased power transfer through the transmission lines....
Tridib K. Das, Sandhya R. Jetti, Ganesh K. Venayag...
HICSS
2008
IEEE
105views Biometrics» more  HICSS 2008»
13 years 9 months ago
Evaluating the Effect of Upgrade, Control and Development Strategies on Robustness and Failure Risk of the Power Transmission Gr
We use the OPA complex systems model of the power transmission system to investigate the effect of a series of different network upgrade scenarios on the long time dynamics and th...
David E. Newman, Benjamin A. Carreras, Vickie E. L...
ISCAS
2008
IEEE
147views Hardware» more  ISCAS 2008»
14 years 3 months ago
Fast frequency acquisition all-digital PLL using PVT calibration
—Fast frequency acquisition is crucial for phase-locked loops (PLLs) used in portable devices, as on-chip clocks are frequently scaled down or up in order to manage power consump...
Hae-Soo Jeon, Duk-Hyun You, In-Cheol Park
32
Voted
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
14 years 12 days ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
CDC
2008
IEEE
119views Control Systems» more  CDC 2008»
14 years 3 months ago
Dissipativity properties of detailed models of synchronous generators
— This paper studies the dissipativity properties of full order dynamic models of synchronous generators. It is shown that, under widely accepted assumptions, these models satisf...
Alvaro Giusto, Alex M. Stankovic, Romeo Ortega