732 search results - page 87 / 147 » Power minimization using control generated clocks |
FMCAD
2008
Springer
13 years 10 months ago
2008
Springer
We describe a general approach for defining new temporal specification languages, and adopting existing languages, for SystemC. We define the concept of "underlying trace"...
EXPCS
2007
14 years 18 days ago
2007
Experimental computer systems research typically ignores the end-user, modeling him, if at all, in overly simple ways. We argue that this (1) results in inadequate performance eva...
RSP
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...
VLSISP
2008
13 years 8 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...