82 search results - page 11 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
ISSS
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper presents a real-time task scheduling technique with a variable voltage processor which can vary its supply voltage dynamically. Using such a processor, running tasks wi...
VTC
2006
IEEE
14 years 1 months ago
2006
IEEE
OFDM has a very high peak-to-average power ratio. This imposes stringent dynamic range requirements on the analog front-ends of the transmitter and receiver and, if a fixedpoint pr...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
Network of workstation (NOW) is a cost-effective alternative to massively parallel supercomputers. As commercially available off-the-shelf processors become cheaper and faster, ...
ISPASS
2009
IEEE
14 years 2 months ago
2009
IEEE
We describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support dynamic voltage and frequency scaling (DVFS):...