82 search results - page 5 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
ASYNC
2005
IEEE
14 years 1 months ago
2005
IEEE
A Globally Asynchronous - Locally Synchronous (GALS) technique for application in wireless communication systems is proposed and evaluated. The GALS wrappers are based on a reques...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) tec...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in ...