390 search results - page 69 / 78 » Power system on a chip (PSoC) |
ACSAC
2008
IEEE
14 years 1 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
SC
2009
ACM
14 years 2 months ago
2009
ACM
Continuous evolution in process technology brings energyefficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high ba...
IISWC
2009
IEEE
14 years 2 months ago
2009
IEEE
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...