172 search results - page 19 / 35 » Power-Aware Speed Scaling in Processor Sharing Systems |
INFOCOM
2009
IEEE
14 years 2 months ago
2009
IEEE
—Load balancing is a common approach for task assignment in distributed architectures. In this paper, we show that the degree of inefficiency in load balancing designs is highly...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
PADS
1997
ACM
13 years 11 months ago
1997
ACM
Large-scale ecological simulations are natural candidates for distributed discrete event simulation. In optimistic simulation of spatially explicit models, a difficult problem ar...
HPDC
2009
IEEE
14 years 2 months ago
2009
IEEE
Since the advent of electronic computing, the processors’ clock speed has risen tremendously. Now that energy efficiency requirements have stopped that trend, the number of proc...