35 search results - page 7 / 7 » Power-Delay Modeling of Dynamic CMOS Gates for Circuit Optim... |
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
DAC
2006
ACM
14 years 3 months ago
2006
ACM
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
CASES
2006
ACM
14 years 3 months ago
2006
ACM
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
ISLPED
2010
ACM
13 years 10 months ago
2010
ACM
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
GECCO
2009
Springer
14 years 4 months ago
2009
Springer
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...