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ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 2 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
ICDCS
2000
IEEE
14 years 2 months ago
Partitionable Light-Weight Groups
Group communication, providing virtual synchrony semantics, is a powerful paradigm for building distributed applications. For applications that require a large number of groups, s...
Luís Rodrigues, Katherine Guo
ASC
2008
13 years 10 months ago
Dynamic data assigning assessment clustering of streaming data
: Discovering interesting patterns or substructures in data streams is an important challenge in data mining. Clustering algorithms are very often applied to identify single substr...
Olga Georgieva, Frank Klawonn
DMDW
2003
134views Management» more  DMDW 2003»
13 years 11 months ago
Using Design Guidelines to Improve Data Warehouse Logical Design
Data Warehouse-(DW) logical design often start with a conceptual schema and then generates relational structures. Applying this approach implies to cope with two main aspects: (i) ...
Verónika Peralta, Raul Ruggia
EURODAC
1995
IEEE
142views VHDL» more  EURODAC 1995»
14 years 1 months ago
Creating hierarchy in HDL-based high density FGPA design
As the density and complexity of FPGA-based designs has increased to 10,000 gates and beyond, the use of high-level design languages (HDLs) is rapidly supplanting schematic entry ...
Carol A. Fields