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IPPS
2008
IEEE
14 years 4 months ago
Design of steering vectors for dynamically reconfigurable architectures
An architectural framework is studied that can perform dynamic reconfiguration. A basic objective is to dynamically reconfigure the architecture so that its configuration is well ...
Nick A. Mould, Brian F. Veale, John K. Antonio, Mo...
HPCC
2007
Springer
14 years 4 months ago
Towards a Complexity Model for Design and Analysis of PGAS-Based Algorithms
Many new Partitioned Global Address Space (PGAS) programming languages have recently emerged and are becoming ubiquitously available on nearly all modern parallel architectures. PG...
Mohamed Bakhouya, Jaafar Gaber, Tarek A. El-Ghazaw...
ISLPED
1995
ACM
122views Hardware» more  ISLPED 1995»
14 years 1 months ago
A multiple clocking scheme for low power RTL design
This paper presents an e ective multiple clocking scheme for lower power RTL circuit design. The basis is to partition a behavioral description of the circuit into m modules fed b...
Christos A. Papachristou, Mark Spining, Mehrdad No...
ICSE
1999
IEEE-ACM
14 years 2 months ago
Architectural Framework Modeling in Telecommunication Domain
Architectural frameworks have shown to increase the design reusability in large-scale object-oriented systems. Drawing on experience in complex software systems development in tel...
Giulio Fregonese, Alessandro Zorer, Giovanni Corte...
CLUSTER
2008
IEEE
14 years 4 months ago
High message rate, NIC-based atomics: Design and performance considerations
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
Keith D. Underwood, Michael Levenhagen, K. Scott H...