Sciweavers

426 search results - page 44 / 86
» Power-Sensitive Multithreaded Architecture
Sort
View
PDP
2009
IEEE
14 years 3 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
14 years 3 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
CASES
2006
ACM
14 years 2 months ago
Extensible control architectures
Architectural advances of modern systems has often been at odds with control complexity, requiring significant effort in both design and verification. This is particularly true ...
Greg Hoover, Forrest Brewer, Timothy Sherwood
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
13 years 13 days ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
INFSOF
2000
98views more  INFSOF 2000»
13 years 8 months ago
Performance comparison of CORBA and RMI
Distributed object architectures and Java are important for building modern, scalable, web-enabled applications. This paper is focused on qualitative and quantitative comparison o...
Matjaz B. Juric, Ivan Rozman, Marjan Hericko