426 search results - page 47 / 86 » Power-Sensitive Multithreaded Architecture |
ICSE
2003
IEEE-ACM
14 years 8 months ago
2003
IEEE-ACM
ion. riented language features, such as abstract classes, inheritance, dynamic binding, and parameterized types. Middleware, such as object-oriented frameworks for host infrastruct...
PDCAT
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. This paper proposes a simplified simultaneous multithreading (SMT) architecture aiming at CPU cores of embedded SoCs for consumer applications. This architecture reduces...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
CASES
2003
ACM
14 years 2 months ago
2003
ACM
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
EUROPAR
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...