426 search results - page 55 / 86 » Power-Sensitive Multithreaded Architecture |
MICRO
2008
IEEE
14 years 3 months ago
2008
IEEE
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
IEEEPACT
2007
IEEE
14 years 3 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
CASES
2005
ACM
13 years 10 months ago
2005
ACM
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
SIGARCH
2008
13 years 8 months ago
2008
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
ASPLOS
2009
ACM
14 years 9 months ago
2009
ACM
To improve the performance of a single application on Chip Multiprocessors (CMPs), the application must be split into threads which execute concurrently on multiple cores. In mult...