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» PowerPC Platform: A System Architecture
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COORDINATION
2007
Springer
14 years 4 months ago
A Coordination Model for Triplespace Computing
Recent advances in middleware technologies propose semantics-aware tuplespaces as an instrument for coping with the requirements of scalability, heterogeneity and dynamism arising ...
Elena Paslaru Bontas Simperl, Reto Krummenacher, L...
MDM
2007
Springer
137views Communications» more  MDM 2007»
14 years 3 months ago
Infrastructure for Data Processing in Large-Scale Interconnected Sensor Networks
Abstract—With the price of wireless sensor technologies diminishing rapidly we can expect large numbers of autonomous sensor networks being deployed in the near future. These sen...
Karl Aberer, Manfred Hauswirth, Ali Salehi
CODES
2005
IEEE
14 years 3 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
14 years 3 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
MICRO
2005
IEEE
140views Hardware» more  MICRO 2005»
14 years 3 months ago
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen,...