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ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 3 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
ICPP
2005
IEEE
14 years 3 months ago
Peak Power Control for a QoS Capable On-Chip Network
In recent years integrating multiprocessors in a single chip is emerging for supporting various scientific and commercial applications, with diverse demands to the underlying on-c...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
ICS
2005
Tsinghua U.
14 years 3 months ago
A performance-conserving approach for reducing peak power consumption in server systems
The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing eno...
Wesley M. Felter, Karthick Rajamani, Tom W. Keller...
CONCUR
2007
Springer
14 years 4 months ago
On the Expressive Power of Global and Local Priority in Process Calculi
Priority is a frequently used feature of many computational systems. In this paper we study the expressiveness of two process algebras enriched with different priority mechanisms...
Cristian Versari, Nadia Busi, Roberto Gorrieri
SIAMDM
2008
113views more  SIAMDM 2008»
13 years 10 months ago
Power Domination in Product Graphs
The power system monitoring problem asks for as few as possible measurement devices to be put in an electric power system. The problem has a graph theory model involving power dom...
Paul Dorbec, Michel Mollard, Sandi Klavzar, Simon ...