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GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 10 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
CP
2005
Springer
15 years 10 months ago
2-Way vs. d-Way Branching for CSP
Abstract. Most CSP algorithms are based on refinements and extensions of backtracking, and employ one of two simple “branching schemes”: 2-way branching or d-way branching, fo...
Joey Hwang, David G. Mitchell
ISLPED
2004
ACM
110views Hardware» more  ISLPED 2004»
15 years 10 months ago
Reducing pipeline energy demands with local DVS and dynamic retiming
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniqu...
Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Au...
CCS
2003
ACM
15 years 9 months ago
Cryptographic tamper evidence
We propose a new notion of cryptographic tamper evidence. A tamper-evident signature scheme provides an additional procedure Div which detects tampering: given two signatures, Div...
Gene Itkis
WCNC
2010
IEEE
15 years 8 months ago
Frequency Reuse Techniques for Attaining Both Coverage and High Spectral Efficiency in OFDMA Cellular Systems
—Inter-cell interference (ICI) is always a big obstacle to attain wide area coverage and high spectral efficiency in cellular systems. In this work we make a study of two well-kn...
Zheng Xie, Bernhard Walke