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DATE
2004
IEEE
147views Hardware» more  DATE 2004»
13 years 11 months ago
Automatic Tuning of Two-Level Caches to Embedded Applications
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
GLOBECOM
2010
IEEE
13 years 5 months ago
Filter-and-Forward Distributed Beamforming for Two-Way Relay Networks with Frequency Selective Channels
Abstract-- A new approach to distributed cooperative beamforming in two-way half-duplex relay networks with frequency selective channels is proposed. In our scheme, two transceiver...
Haihua Chen, Alex B. Gershman, Shahram Shahbazpana...
GLOBECOM
2008
IEEE
13 years 8 months ago
On the Capacity of One-Sided Two User Gaussian Fading Broadcast Channels
In this paper, we investigate upper and lower bounds on the capacity of two-user fading broadcast channels where one of the users has a constant (non-fading) channel. We use the Co...
Amin Jafarian, Sriram Vishwanath
EVOW
2011
Springer
12 years 11 months ago
Two Iterative Metaheuristic Approaches to Dynamic Memory Allocation for Embedded Systems
Abstract. Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant imp...
María Soto, André Rossi, Marc Sevaux
CLUSTER
2006
IEEE
14 years 1 months ago
Matrix Multiplication on Two Interconnected Processors
This paper presents a new partitioning algorithm to perform matrix multiplication on two interconnected heterogeneous processors. Data is partitioned in a way which minimizes the ...
Brett A. Becker, Alexey L. Lastovetsky