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VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
16 years 4 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 4 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 1 months ago
A unified non-rectangular device and circuit simulation model for timing and power
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
Sean X. Shi, Peng Yu, David Z. Pan
DSN
2009
IEEE
15 years 11 months ago
Power supply induced common cause faults-experimental assessment of potential countermeasures
Fault-tolerant architectures based on physical replication of components are vulnerable to faults that cause the same effect in all replica. Short outages in a power supply shared...
Peter Tummeltshammer, Andreas Steininger
LCN
2008
IEEE
15 years 10 months ago
Efficient power management for Wireless Sensor Networks: A data-driven approach
—Providing energy-efficient continuous data collection services is of paramount importance to Wireless Sensor Network (WSN) applications. This paper proposes a new power manageme...
MingJian Tang, Jinli Cao, Xiaohua Jia