This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
We consider a secondary usage of spectrum scenario where a secondary network coexists and/or shares the radio spectrum with a primary network to which the spectrum is licensed. The...
This paper presents a new algorithm for jointly optimal control of session rate, link attempt rate, and link power in contention based MultiHop Wireless Networks. Formulating the ...
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...