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VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
14 years 7 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
TASE
2007
IEEE
14 years 1 months ago
Evaluation of SAT-based Bounded Model Checking of ACTL Properties
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...
Yanyan Xu, Wei Chen, Liang Xu, Wenhui Zhang
ACSAC
2009
IEEE
14 years 2 months ago
HIMA: A Hypervisor-Based Integrity Measurement Agent
Abstract—Integrity measurement is a key issue in building trust in distributed systems. A good solution to integrity measurement has to provide both strong isolation between the ...
Ahmed M. Azab, Peng Ning, Emre Can Sezer, Xiaolan ...
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
14 years 4 months ago
Multigrid-Like Technique for Power Grid Analysis
— Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on ...
Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm
ACNS
2009
Springer
142views Cryptology» more  ACNS 2009»
14 years 2 months ago
Integrity Protection for Revision Control
Abstract. Users of online-collaboration tools and network storage services place considerable trust in their providers. This paper presents a novel approach for protecting data int...
Christian Cachin, Martin Geisler