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ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
CC
2011
Springer
270views System Software» more  CC 2011»
12 years 11 months ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
ISLPED
2007
ACM
57views Hardware» more  ISLPED 2007»
13 years 9 months ago
Resource area dilation to reduce power density in throughput servers
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...
Michael D. Powell, T. N. Vijaykumar
CDES
2006
158views Hardware» more  CDES 2006»
13 years 9 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
ICC
2007
IEEE
113views Communications» more  ICC 2007»
14 years 1 months ago
Utility-Aware Resource Allocation for Multi-Stream Overlay Multicast
Abstract - Overlay multicast, which performs topology construction and data relaying in the application layer, has recently emerged as a promising vehicle for data distribution. In...
Ji Xu, Jiangchuan Liu, Hsiao-Hwa Chen, Xiao Chu