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» Precise Analysis of Memory Consumption using Program Logics
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TCAD
2008
127views more  TCAD 2008»
13 years 7 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
14 years 4 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang
IWMM
2009
Springer
130views Hardware» more  IWMM 2009»
14 years 2 months ago
A component model of spatial locality
Good spatial locality alleviates both the latency and bandwidth problem of memory by boosting the effect of prefetching and improving the utilization of cache. However, convention...
Xiaoming Gu, Ian Christopher, Tongxin Bai, Chengli...
AOSD
2008
ACM
13 years 9 months ago
AJANA: a general framework for source-code-level interprocedural dataflow analysis of AspectJ software
Aspect-oriented software presents new challenges for the designers of static analyses. Our work aims to establish systematic foundations for dataflow analysis of AspectJ software....
Guoqing Xu, Atanas Rountev
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
13 years 11 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...