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DAC
2003
ACM
14 years 10 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
14 years 6 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
SAC
2010
ACM
14 years 4 months ago
Mobile air pollution monitoring network
Current methods of estimating air quality involve assigning a single value called the Air Quality Index (AQI) to a large land area for a 24-hour period based on a very few, sparse...
W. Hedgecock, Péter Völgyesi, Á...
IEEEPACT
2006
IEEE
14 years 3 months ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...
IPPS
2006
IEEE
14 years 3 months ago
Realization of virtual networks in the DECOS integrated architecture
Due to the better utilization of computational and communication resources and the improved coordination of application subsystems, designers of large distributed embedded systems...
Roman Obermaisser, Philipp Peti