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» Predictable Embedded Multiprocessor System Design
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CASES
2009
ACM
14 years 1 months ago
Parallel, hardware-supported interrupt handling in an event-triggered real-time operating system
A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks th...
Fabian Scheler, Wanja Hofer, Benjamin Oechslein, R...
DAC
2003
ACM
14 years 7 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
RTCSA
2007
IEEE
14 years 1 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
EMSOFT
2006
Springer
13 years 10 months ago
Time-triggered implementations of dynamic controllers
Bridging the gap between model-based design and platformbased implementation is one of the critical challenges for embedded software systems. In the context of embedded control sy...
Truong Nghiem, George J. Pappas, Rajeev Alur, Anto...
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 6 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...