492 search results - page 15 / 99 » Predictable performance in SMT processors |
ICCD
2001
IEEE
14 years 5 months ago
2001
IEEE
Filter cache has been proposed as an energy saving architectural feature [9]. A filter cache is placed between the CPU and the instruction cache (I-cache) to provide the instruct...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Granularity control is an effective means for trading power consumption with performance on dense shared memory multiprocessors, such as multi-SMT and multi-CMP systems. In this p...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
SC
2009
ACM
14 years 3 months ago
2009
ACM
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...