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» Predictable performance in SMT processors
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ISCA
2003
IEEE
136views Hardware» more  ISCA 2003»
14 years 2 months ago
Transient-Fault Recovery for Chip Multiprocessors
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz,...
ISPASS
2009
IEEE
14 years 3 months ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
ASAP
2002
IEEE
85views Hardware» more  ASAP 2002»
14 years 1 months ago
Predictable Instruction Caching for Media Processors
The determinism of instruction cache performance can be considered a major problem in multi-media devices which hope to maximise their quality of service. If instructions are evic...
James Irwin, David May, Henk L. Muller, Dan Page
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
14 years 9 days ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
ISLPED
2009
ACM
123views Hardware» more  ISLPED 2009»
14 years 1 months ago
Predict and act: dynamic thermal management for multi-core processors
In this paper, we propose a proactive dynamic thermal management scheme for chip multiprocessors that run multi-threaded workloads. We introduce a new predictor that utilizes the ...
Raid Zuhair Ayoub, Tajana Simunic Rosing