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» Predictable performance in SMT processors
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JSA
2008
142views more  JSA 2008»
13 years 8 months ago
A Java processor architecture for embedded real-time systems
Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches, branch prediction, and out-of-order execution. However...
Martin Schoeberl
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 5 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu
MICRO
2002
IEEE
122views Hardware» more  MICRO 2002»
14 years 1 months ago
Microarchitectural denial of service: insuring microarchitectural fairness
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
Dirk Grunwald, Soraya Ghiasi
ARCS
2009
Springer
14 years 3 months ago
Empirical Performance Models for Java Workloads
Abstract. Java is widely deployed on a variety of processor architectures. Consequently, an understanding of microarchitecture level Java performance is critical to optimize curren...
Pradeep Rao, Kazuaki Murakami
ISCA
1999
IEEE
90views Hardware» more  ISCA 1999»
14 years 1 months ago
Correlated Load-Address Predictors
As microprocessors become faster, the relative performance cost of memory accesses increases. Bigger and faster caches significantly reduce the absolute load-to-use time delay. Ho...
Michael Bekerman, Stéphan Jourdan, Ronny Ro...