492 search results - page 96 / 99 » Predictable performance in SMT processors |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
The negative performance impact of branch mis-predictions can be reduced by exploiting control independence (CI). When a branch mis-predicts, the wrong-path instructions up to the...
SENSYS
2005
ACM
14 years 1 months ago
2005
ACM
Sensing technology is a cornerstone for many industrial applications. Manufacturing plants and engineering facilities, such as shipboard engine rooms, require sensors to ensure pr...
ICS
2001
Tsinghua U.
13 years 12 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...