598 search results - page 113 / 120 » Predicting Lattice Reduction |
168
Voted
BMCBI
2010
15 years 1 months ago
2010
Background: With the expansion of public repositories such as the Gene Expression Omnibus (GEO), we are rapidly cataloging cellular transcriptional responses to diverse experiment...
120
Voted
TCAD
2010
14 years 10 months ago
2010
Starting from the 90nm technology node, process induced stress has played a key role in the design of highperformance devices. The emergence of source/drain silicon germanium (S/D ...
168
Voted
MOBISYS
2010
ACM
15 years 6 months ago
2010
ACM
We investigate if WiFi access can be used to augment 3G capacity in mobile environments. We first conduct a detailed study of 3G and WiFi access from moving vehicles, in three dif...
123
Voted
DAC
2000
ACM
16 years 4 months ago
2000
ACM
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
134
Voted
DAC
2006
ACM
16 years 4 months ago
2006
ACM
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...