160 search results - page 6 / 32 » Predicting component failures at design time |
ICAC
2005
IEEE
14 years 1 months ago
2005
IEEE
Grid environments enable users to share non-dedicated resources that lack performance guarantees. This paper describes the design of application-centric middleware components to a...
IESS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
ICC
2008
IEEE
14 years 2 months ago
2008
IEEE
—In battery-constrained large-scale sensor networks, nodes are prone to random failures due to various reasons, such as energy depletion and hostile environment. Random failures ...
ETS
2006
IEEE
14 years 1 months ago
2006
IEEE
- The resources available on a chip continue to grow, following Moore's Law. However, the major process by which the benefits of Moore's Law accrue, which is the continui...
DSN
2002
IEEE
14 years 21 days ago
2002
IEEE
Designing applications with timeliness requirements in environments of uncertain synchrony is known to be a difficult problem. In this paper, we follow the perspective of timing ...