64 search results - page 3 / 13 » Predicting memory-access cost based on data-access patterns |
JSAC
2006
13 years 7 months ago
2006
High-speed packet content inspection and filtering devices rely on a fast multi-pattern matching algorithm which is used to detect predefined keywords or signatures in the packets....
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
RTAS
2005
IEEE
14 years 1 months ago
2005
IEEE
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
TCAD
2008
13 years 7 months ago
2008
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
ACNS
2006
Springer
13 years 11 months ago
2006
Springer
CPU bound client puzzles have been suggested as a defense mechanism against connection depletion attacks. However, the wide disparity in CPU speeds prevents such puzzles from being...