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147
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WEA
2007
Springer
74views Algorithms» more  WEA 2007»
15 years 10 months ago
Landmark-Based Routing in Dynamic Graphs
Many speed-up techniques for route planning in static graphs exist, only few of them are proven to work in a dynamic scenario. Most of them use preprocessed information, which has ...
Daniel Delling, Dorothea Wagner
163
Voted
ISHPC
1999
Springer
15 years 8 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
VLDB
1998
ACM
102views Database» more  VLDB 1998»
15 years 8 months ago
A Database System for Real-Time Event Aggregation in Telecommunication
Telecommunication networks process verylarge numbers of events in real time. In this environment, database applications demand both high throughput (at reasonable costs), and pred...
Jerry Baulier, Stephen Blott, Henry F. Korth, Abra...
MICRO
1993
IEEE
131views Hardware» more  MICRO 1993»
15 years 8 months ago
Superblock formation using static program analysis
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
Richard E. Hank, Scott A. Mahlke, Roger A. Bringma...
CASES
2007
ACM
15 years 8 months ago
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter