Many speed-up techniques for route planning in static graphs exist, only few of them are proven to work in a dynamic scenario. Most of them use preprocessed information, which has ...
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Telecommunication networks process verylarge numbers of events in real time. In this environment, database applications demand both high throughput (at reasonable costs), and pred...
Jerry Baulier, Stephen Blott, Henry F. Korth, Abra...
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
Richard E. Hank, Scott A. Mahlke, Roger A. Bringma...
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...