47 search results - page 3 / 10 » Prefetch-Aware DRAM Controllers |
ICS
2011
Tsinghua U.
13 years 1 months ago
2011
Tsinghua U.
Phase-Change Memory (PCM) technology has received substantial attention recently. Because PCM is byte-addressable and exhibits access times in the nanosecond range, it can be used...
HPCA
2001
IEEE
14 years 10 months ago
2001
IEEE
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs ...
MICRO
2009
IEEE
14 years 4 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
ASYNC
2003
IEEE
14 years 3 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
ICASSP
2009
IEEE
13 years 7 months ago
2009
IEEE
We have developed a VLSI chip for 5,000 word speakerindependent continuous speech recognition. This chip employs a context-dependent HMM (hidden Markov model) based speech recogni...