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MICRO
2008
IEEE
121views Hardware» more  MICRO 2008»
14 years 1 months ago
Temporal instruction fetch streaming
—L1 instruction-cache misses pose a critical performance bottleneck in commercial server workloads. Cache access latency constraints preclude L1 instruction caches large enough t...
Michael Ferdman, Thomas F. Wenisch, Anastasia Aila...
IDA
2003
Springer
14 years 17 days ago
Very Predictive Ngrams for Space-Limited Probabilistic Models
In sequential prediction tasks, one repeatedly tries to predict the next element in a sequence. A classical way to solve these problems is to fit an order-n Markov model to the da...
Paul R. Cohen, Charles A. Sutton
HPCA
2009
IEEE
14 years 8 months ago
Practical off-chip meta-data for temporal memory streaming
Prior research demonstrates that temporal memory streaming and related address-correlating prefetchers improve performance of commercial server workloads though increased memory l...
Thomas F. Wenisch, Michael Ferdman, Anastasia Aila...
ICS
2001
Tsinghua U.
13 years 11 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
IJCAI
2007
13 years 8 months ago
Simple Training of Dependency Parsers via Structured Boosting
Recently, significant progress has been made on learning structured predictors via coordinated training algorithms such as conditional random fields and maximum margin Markov ne...
Qin Iris Wang, Dekang Lin, Dale Schuurmans