Sciweavers

155 search results - page 3 / 31
» Preliminary performance evaluation of an adaptive dynamic ex...
Sort
View
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 1 months ago
Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
Po-Kuan Huang, Soheil Ghiasi
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 11 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
CORR
2007
Springer
116views Education» more  CORR 2007»
13 years 7 months ago
DOEF: A Dynamic Object Evaluation Framework
Abstract. In object-oriented or object-relational databases such as multimedia databases or most XML databases, access patterns are not static, i.e., applications do not always acc...
Zhen He, Jérôme Darmont
TPDS
2008
93views more  TPDS 2008»
13 years 7 months ago
Evaluating Dynamic Task Mapping in Network Processor Runtime Systems
Modern network processor systems require the ability to adapt their processing capabilities at runtime to changes in network traffic. Traditionally, network processor applications ...
Xin Huang, Tilman Wolf
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
14 years 2 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky