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VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 8 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 1 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar
ICFP
2010
ACM
13 years 8 months ago
The impact of higher-order state and control effects on local relational reasoning
Reasoning about program equivalence is one of the oldest problems in semantics. In recent years, useful techniques have been developed, based on bisimulations and logical relation...
Derek Dreyer, Georg Neis, Lars Birkedal
POPL
2012
ACM
12 years 3 months ago
Resource-sensitive synchronization inference by abduction
We present an analysis which takes as its input a sequential program, augmented with annotations indicating potential parallelization opportunities, and a sequential proof, writte...
Matko Botincan, Mike Dodds, Suresh Jagannathan
STOC
2003
ACM
188views Algorithms» more  STOC 2003»
14 years 8 months ago
Almost random graphs with simple hash functions
We describe a simple randomized construction for generating pairs of hash functions h1, h2 from a universe U to ranges V = [m] = {0, 1, . . . , m - 1} and W = [m] so that for ever...
Martin Dietzfelbinger, Philipp Woelfel