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ISCA
2005
IEEE
118views Hardware» more  ISCA 2005»
14 years 1 months ago
Continuous Optimization
This paper presents a hardware-based dynamic optimizer that continuously optimizes an application’s instruction stream. In continuous optimization, dataflow optimizations are p...
Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steve...
ISCA
2002
IEEE
96views Hardware» more  ISCA 2002»
14 years 14 days ago
Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines
Leakage power is dominated by critical paths, and hence dynamic deactivation of fast transistors can yield large savings. We introduce metrics for comparing fine-grain dynamic de...
Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste...
ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
14 years 1 months ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob
WISES
2003
13 years 9 months ago
Locating Moving Objects over Mobile Sensor Network
The purpose of our on going research would be to track entities, which enter their field of vision over the sensor network. Based on their sightings, they maintain a dynamic cache ...
Arvind Nath Rapaka, Sandeep Bogollu, Donald C. Wun...
DAMON
2009
Springer
14 years 2 months ago
Cache-conscious buffering for database operators with state
Database processes must be cache-efficient to effectively utilize modern hardware. In this paper, we analyze the importance of temporal locality and the resultant cache behavior ...
John Cieslewicz, William Mee, Kenneth A. Ross