154 search results - page 15 / 31 » Process Scheduling for Performance Estimation and Synthesis ... |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
CODES
1996
IEEE
14 years 24 days ago
1996
IEEE
This reported work applies a transformational synthesis approach to hardware/software codesign. In this approach, the process of algorithm design is coupled early on with hardware...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
CGO
2004
IEEE
14 years 11 days ago
2004
IEEE
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing ...
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...