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» Process Variations and their Impact on Circuit Operation
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JCP
2008
232views more  JCP 2008»
13 years 7 months ago
Low Power SRAM with Boost Driver Generating Pulsed Word Line Voltage for Sub-1V Operation
Instability of SRAM memory cells derived from the process variation and lowered supply voltage has recently been posing significant design challenges for low power SoCs. This paper...
Masaaki Iijima, Kayoko Seto, Masahiro Numa, Akira ...
ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
14 years 4 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan
GLVLSI
2006
IEEE
144views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Crosstalk analysis in nanometer technologies
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
Shahin Nazarian, Ali Iranli, Massoud Pedram
DFT
2008
IEEE
182views VLSI» more  DFT 2008»
13 years 9 months ago
Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis
This paper addresses a new threat to the security of integrated circuits (ICs). The migration of IC fabrication to untrusted foundries has made ICs vulnerable to malicious alterat...
Xiaoxiao Wang, Hassan Salmani, Mohammad Tehranipoo...
SLIP
2009
ACM
14 years 1 months ago
Is overlay error more important than interconnect variations in double patterning?
Double patterning lithography seems to be a prominent choice for 32nm and 22nm technologies. Double patterning lithography techniques require additional masks for a single interco...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...