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» Process variation dimension reduction based on SVD
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ISPD
2007
ACM
151views Hardware» more  ISPD 2007»
13 years 10 months ago
Pattern sensitive placement for manufacturability
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
Shiyan Hu, Jiang Hu
ISLPED
2010
ACM
202views Hardware» more  ISLPED 2010»
13 years 9 months ago
MODEST: a model for energy estimation under spatio-temporal variability
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
ICCAD
2003
IEEE
221views Hardware» more  ICCAD 2003»
14 years 6 months ago
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
Le Yan, Jiong Luo, Niraj K. Jha
AUSAI
2007
Springer
14 years 3 months ago
Merging Algorithm to Reduce Dimensionality in Application to Web-Mining
Dimensional reduction may be effective in order to compress data without loss of essential information. Also, it may be useful in order to smooth data and reduce random noise. The...
Vladimir Nikulin, Geoffrey J. McLachlan
JCIT
2010
156views more  JCIT 2010»
13 years 3 months ago
Intelligent Monitoring Approach for Pipeline Defect Detection from MFL Inspection
Artificial Neural Networks(ANNS) have top level of capability to progress the estimation of cracks in metal tubes. The aim of this paper is to propose an algorithm to identify mod...
Saeedreza Ehteram, Seyed Zeinolabedin Moussavi, Mo...