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ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
14 years 1 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
DAC
1997
ACM
14 years 8 days ago
CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries
This paper describes a fully automatic standard-cell layout synthesis system, CELLERITY. The system is flexible in supporting a wide variety of process technologies and a range of...
Mohankumar Guruswamy, Robert L. Maziasz, Daniel Du...
ISQED
2011
IEEE
329views Hardware» more  ISQED 2011»
13 years 12 days ago
New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm
The extent to which the 6T SRAM bit cell can be perpetuated through continued scaling is of enormous technological and economic importance. Understanding the growing limitations i...
Randy W. Mann, Benton H. Calhoun
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 3 months ago
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration
Nanowire crossbar is one of the most promising circuit solutions for nanoelectronics. We show nanowire crossbars do not scale well in terms of logic density and speed. We conseque...
Mian Dong, Lin Zhong
ALIFE
2004
13 years 8 months ago
The Data-and-Signals Cellular Automaton and Its Application to Growing Structures
In a traditional cellular automaton (CA) a cell is implemented by a rule table defining its state at the next time step, given its present state and those of its neighbors. The cel...
André Stauffer, Moshe Sipper