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» Processor Architectures for Ontogenesis
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EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 8 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
LCPC
2005
Springer
15 years 10 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
SC
2005
ACM
15 years 10 months ago
Multilevel Parallelism in Computational Chemistry using Common Component Architecture and Global Arrays
The development of complex scientific applications for high-end systems is a challenging task. Addressing complexity of the involved software and algorithms is becoming increasing...
Manojkumar Krishnan, Yuri Alexeev, Theresa L. Wind...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 9 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
ICCD
2002
IEEE
135views Hardware» more  ICCD 2002»
16 years 1 months ago
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
We present a co-simulation environment for multiprocessor architectures, that is based on SystemC and allows a transparent integration of instruction set simulators (ISSs) within ...
Luca Benini, Davide Bertozzi, Davide Bruni, Nicola...