2700 search results - page 134 / 540 » Processor Architectures for Ontogenesis |
147
click to vote
IWMM
2000
Springer
15 years 8 months ago
2000
Springer
We investigate reference counting in the context of a multithreaded architecture by exploiting two observations: (1) reference-counting can be performed by a transformed program s...
121
click to vote
CSREASAM
2007
15 years 6 months ago
2007
A preliminary model is introduced in this paper whereby data and its associated security properties are treated as a single atomic unit of information in a hardwareonly context. Se...
155
click to vote
CMG
2000
15 years 5 months ago
2000
Our study compares CPU performance on RISC and CISC uni and multiprocessors of varying speeds, and shows that the Instruction Set Architecture (ISA) style no longer matters. Our s...
142
click to vote
VLSISP
2008
15 years 4 months ago
2008
H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
120
click to vote
ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
— A reduced complexity LDPC decoding method is presented that dramatically reduces wire interconnect complexity, which is a major issue in LDPC decoders. The proposed Split-Row m...