2700 search results - page 146 / 540 » Processor Architectures for Ontogenesis |
147
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ARITH
2001
IEEE
15 years 8 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
134
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ICPP
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—This paper analyzes energy characteristics of parallel algorithms executed on scalable multicore processors. Specifically, we provide a methodology for evaluating energ...
153
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IPPS
2007
IEEE
15 years 11 months ago
2007
IEEE
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
116
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ISSS
1996
IEEE
15 years 8 months ago
1996
IEEE
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
135
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DSD
2009
IEEE
15 years 8 months ago
2009
IEEE
In this paper, we present a novel method for merging sets of computational patterns into a reconfigurable cell respecting design constraints and optimizing specific design aspects...