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» Processor Architectures for Ontogenesis
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ISCA
2003
IEEE
112views Hardware» more  ISCA 2003»
15 years 9 months ago
A Pipelined Memory Architecture for High Throughput Network Processors
Designing ASICs for each new generation of backbone routers is a time intensive and fiscally draining process. In this paper we focus on the design of a programmable architecture...
Timothy Sherwood, George Varghese, Brad Calder
124
Voted
DAMON
2007
Springer
15 years 10 months ago
Architectural characterization of XQuery workloads on modern processors
As XQuery rapidly emerges as the standard for querying XML documents, it is very important to understand the architectural characteristics and behaviors of such workloads. A lot o...
Rubao Lee, Bihui Duan, Taoying Liu
138
Voted
DATE
2006
IEEE
159views Hardware» more  DATE 2006»
15 years 9 months ago
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
15 years 10 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
ISLPED
2006
ACM
76views Hardware» more  ISLPED 2006»
15 years 9 months ago
Synergistic temperature and energy management in GALS processor architectures
We propose a synergistic temperature and energy management scheme for GALS processors. Localized DVS is applied in domains that contain hotspots, permitting other critical domains...
YongKang Zhu, David H. Albonesi