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» Processor Architectures for Ontogenesis
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CODES
2005
IEEE
15 years 9 months ago
FlexPath NP: a network processor concept with application-driven flexible processing paths
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...
Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild
ICMCS
2006
IEEE
96views Multimedia» more  ICMCS 2006»
15 years 10 months ago
PAC DSP Core and Application Processors
This paper provides an overview of the Parallel Architecture Core (PAC) project led by SoC Technology Center of Industrial Technology Research Institute (STC/ITRI) in Taiwan. The ...
David Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, W...
ISCAS
2005
IEEE
121views Hardware» more  ISCAS 2005»
15 years 9 months ago
On-board fault-tolerant SAR processor for spaceborne imaging radar systems
A real-timehigh-performanceand fault-tolerantFPGA-based hardware architecture for the processing of synthetic apertureradar (SAR) images has been developed for advanced spaceborner...
Wai-Chi Fang, C. Le, S. Taft
ISCA
1996
IEEE
102views Hardware» more  ISCA 1996»
15 years 8 months ago
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, He...
EMSOFT
2010
Springer
15 years 2 months ago
Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architectures
We propose a technique to automatically synthesize programs and schedules for hard real-time distributed (embedded) systems from synchronous data-flow models. Our technique connec...
Dumitru Potop-Butucaru, Akramul Azim, Sebastian Fi...