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» Processor Architectures for Ontogenesis
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CC
2005
Springer
108views System Software» more  CC 2005»
15 years 9 months ago
Task Partitioning for Multi-core Network Processors
Abstract. Network processors (NPs) typically contain multiple concurrent processing cores. State-of-the-art programming techniques for NPs are invariably low-level, requiring progr...
Robert Ennals, Richard Sharp, Alan Mycroft
FPL
2004
Springer
128views Hardware» more  FPL 2004»
15 years 9 months ago
Design and Implementation of a CFAR Processor for Target Detection
Real-time performance of adaptive digital signal processing algorithms is required in many applications but it often means a high computational load for many conventional processor...
Cesar Torres-Huitzil, René Cumplido-Parra, ...
ISCAS
2003
IEEE
105views Hardware» more  ISCAS 2003»
15 years 9 months ago
Algorithmic partial analog-to-digital conversion in mixed-signal array processors
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
Roman Genov, Gert Cauwenberghs
ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
15 years 8 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...
ISSS
1999
IEEE
120views Hardware» more  ISSS 1999»
15 years 8 months ago
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandr...