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» Processor Architectures for Ontogenesis
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HPCA
2005
IEEE
15 years 9 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
EMSOFT
2003
Springer
15 years 9 months ago
HOKES/POKES: Light-Weight Resource Sharing
Abstract. In this paper, we explain mechanisms for providing embedded network processors and other low-level programming environments with light-weight support for safe resource sh...
Herbert Bos, Bart Samwel
IPPS
2006
IEEE
15 years 10 months ago
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling,...
M. De Vuyst, Rakesh Kumar, Dean M. Tullsen
ARC
2006
Springer
120views Hardware» more  ARC 2006»
15 years 7 months ago
Applications of Small-Scale Reconfigurability to Graphics Processors
We explore the application of Small-Scale Reconfigurability (SSR) to graphics hardware. SSR is an architectural technique wherein functionality common to multiple subunits is reuse...
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, ...
ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
15 years 6 months ago
System-level design space exploration for security processor prototyping in analytical approaches
— The customization of architectures in designing the security processor-based systems typically involves timeconsuming simulation and sophisticated analysis in the exploration o...
Yung-Chia Lin, Chung-Wen Huang, Jenq Kuen Lee