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» Processor Architectures for Ontogenesis
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ICCD
2000
IEEE
159views Hardware» more  ICCD 2000»
15 years 8 months ago
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
Deependra Talla, Lizy Kurian John, Viktor S. Lapin...
GLVLSI
2010
IEEE
220views VLSI» more  GLVLSI 2010»
15 years 6 months ago
Thermal-aware voltage droop compensation for multi-core architectures
As the rated performance of microprocessors increases, voltage droop emergencies become a significant problem. In this paper, two new techniques to combat voltage droop emergencie...
Jia Zhao, Basab Datta, Wayne P. Burleson, Russell ...
IPPS
1998
IEEE
15 years 8 months ago
Evaluation of a Low-Power Reconfigurable DSP Architecture
Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an archit...
Arthur Abnous, Katsunori Seno, Yuji Ichikawa, Marl...
IASTEDCCS
2004
121views Hardware» more  IASTEDCCS 2004»
15 years 5 months ago
Performance of hyperspectral imaging algorithms using itanium architecture
This paper describes the experiences and results on implementing a set of hyperspectral imaging analysis algorithms on the Itanium Processor Family. On Itanium architecture all in...
Wilfredo E. Lugo-Beauchamp, Kennie Cruz, Carmen L....
HPCA
2009
IEEE
16 years 4 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...