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MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
15 years 7 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
104
Voted
SIGPLAN
2008
15 years 2 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
Simone Campanoni, Giovanni Agosta, Stefano Crespi-...
IJHPCA
2008
75views more  IJHPCA 2008»
15 years 2 months ago
Towards Ultra-High Resolution Models of Climate and Weather
We present a speculative extrapolation of the performance aspects of an atmospheric general circulation model to ultra-high resolution and describe alternative technological paths...
Michael F. Wehner, Leonid Oliker, John Shalf
JSS
2006
80views more  JSS 2006»
15 years 2 months ago
Polyhedral space generation and memory estimation from interface and memory models of real-time video systems
We present a tool and a methodology for estimating the memory storage requirement for synchronous real-time video processing systems. Typically, a designer will use the feedback i...
Benny Thörnberg, Qubo Hu, Martin Palkovic, Ma...
151
Voted
ESOP
2012
Springer
13 years 10 months ago
Concurrent Library Correctness on the TSO Memory Model
Abstract. Linearizability is a commonly accepted notion of correctness for libraries of concurrent algorithms. Unfortunately, it is only appropriate for sequentially consistent mem...
Sebastian Burckhardt, Alexey Gotsman, Madanlal Mus...