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» Processor Models for Retargetable Tools
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ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 1 months ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
IPPS
2000
IEEE
13 years 11 months ago
Predicting Performance on SMPs. A Case Study: The SGI Power Challenge
We study the issue of performance prediction on the SGIPower Challenge, a typical SMP. On such a platform, the cost of memory accesses depends on their locality and on contention ...
Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andre...
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
ASWC
2008
Springer
13 years 9 months ago
Semantic Assistants - User-Centric Natural Language Processing Services for Desktop Clients
Today's knowledge workers have to spend a large amount of time and manual effort on creating, analyzing, and modifying textual content. While more advanced semantically-orient...
René Witte, Thomas Gitzinger
JMLR
2006
80views more  JMLR 2006»
13 years 7 months ago
Using Machine Learning to Guide Architecture Simulation
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Cald...